1. Technical Field
The present invention relates to a semiconductor device.
2. Related Art
Conventionally, a semiconductor device comprising a trench portion has been known in which a P+ layer for contact is formed to be a striped shape parallel to the trench portion (for example, see Patent Document 1).
Patent Document 1: Japanese Patent Application Publication No. 2011-187593
However, as a downscale of the conventional semiconductor device is progressed to narrow a trench interval, the P+ layer may contact the trench portion to increase a gate threshold voltage unexpectedly.